Phase-locked loop circuit (PLL's) are feedback circuits with a certain gain-bandwidth product. In simplified form, that gain-bandwidth product is typically the charge pump and loop filter gain times the VCO gain. The gain can be straightforwardly set to any desired value typically by setting the magnitude of a current source which drives the charge pump and loop filter. Practically speaking, there is a maximum allowed value for the gain-bandwidth product, and therefore the current source, which is related to the lowest input clock frequency which the PLL wants to lock to.
One operation required of a PLL is acquisition. When the PLL is first powered up, the output control voltage of the loop filter may be zero, and therefore the VCO will not oscillate at all. Then the PLL is powered on, and a 50 MHz input clock (for example) is presented to the phase detector. The phase detector and charge pump must slew the output voltage of the loop filter upwards to a sufficient value so that the VCO oscillates at the correct frequency. The time it takes to do this is partially determined by the setting of the magnitude of the current source reference for the charge pump. The smaller the current source, the longer the acquisition time. It is desired to increase the value of this current source to minimize acquisition time, but there are limits to this, as described in the paragraph above, since the gain-bandwidth product of the PLL is directly proportional to the value of the current source, and the allowable gain-bandwidth product is limited.
A circuit which could get around these limits would be a useful feature in a PLL, because it could reduce the acquisition time, while not disturbing the PLL's gain-bandwidth product.
According to one aspect of the present invention a phase-locked loop is provided that includes a multi-cycle phase detector that detects the phase difference between an input signal and a reference signal and provides an output signal representative thereof. The output signal is updated at least every cycle of the reference signal. A control circuit receives the output signal and generates a control signal for a voltage controlled oscillator (VCO) in response thereto. The control signal is applied to a VCO, and the output of the VCO is applied to the multi-cycle phase detector as the input signal thereof that is compared against the reference signal.
According to another aspect of the present invention, a phase-locked loop is provided that includes a phase detector that detects the phase difference between an input signal and a reference signal and provides a first output signal representative of a phase difference less than a single cycle and a second output signal representative of a phase difference greater than a single cycle. A control circuit receives the first and second output signals and provides a VCO control signal responsive to those two output signals.